Senior design engineer, ASIC, Verilog and SystemVerilog, growth opportunity

Join a multi-faceted engineering team developing custom ASICs for high speed signal processing and control. Ambitious candidates will appreciate this growing company with a strong track-record and product portfolio and the chance for peer-driven skills development. A host of perks and elective opportunities for travel are available.

You will have:

* A wealth of IC design experience across design specification, Verilog and SystemVerilog RTL design including block-level modules, testbenches, clock schemes and power domains, on-chip and board-level interfacing and comms, verification and backend flows.

* Ideally, additional experience with any of the following: Xilinx FPGA development, Vivado Design Suite, embedded firmware for ARM Cortex-M, SoC, mixed-signal, PCB design and electronics benchwork skills.

Strong communication skills are also expected along with exemplary attention to detail, with a focus on delivering on time as part of a lively and collaborative group of colleagues. Existing long-term UK work permission without sponsorship is required.

Benefits include a competitive base salary, private medical care, life assurance, peer-led training, and optional perks such as business travel, social and sporting activities. The company is based in the city of Cambridge, cycle-friendly and on major bus and rail routes.

Keywords: IC design, RTL, Verilog, SystemVerilog, clock, power, backend, digital, analogue, mixed signal, SPI, I2C, JTAG, APB, EDA, UVM, SVA, VIP, UPF, Xilinx, FPGA, Vivado, ARM Cortex-M, SoC, PCB design, embedded C.

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